Microprocessors have long been used in a wide variety of applications, such as computers, automobiles, appliances, and hand-help devices such as cameras, personal digital assistants (PDAs) and cell phones. Often times, the same microprocessor type is used for several such applications by using software that is specific for the application. Because the microprocessors are typically designed to be used for a variety of applications, the architecture of the microprocessor cannot generally be optimized for any one application. Thus, the typical microprocessor is relatively inefficient for a specific application, compared to a microprocessor designed for that specific application.
Microprocessors or logic devices can be designed for specific or semi-specific applications. In this case, custom or semi-custom logic functions can be implemented in the hardware itself, rather than in corresponding software, making these devices more efficient. Such circuits also typically require fewer transistors to perform their intended function, compared to traditional microprocessors, and thus power consumption of these processors is typically less compared to typical microprocessors. Reduced power consumption is particularly desirable in hand-held or portable devices, where stored energy or power is at a premium.
Although custom or semi-custom processors can perform their intended functions faster and with less power, compared to traditional microprocessors, the custom processors are generally expensive to design and manufacture and require additional design time. Thus, these processors are typically only used where large volumes of the same processor are required, such that the increased cost of the microprocessor can be recouped.
Furthermore, because the custom processors are designed for a particular application, various appliances, such as PDAs, cell phones, cameras, and the like would require multiple application-specific processors to perform their multiple functions. Use of multiple processors in a single appliance results in reduced power efficiency. Thus, many of the benefits associated with custom microprocessors may be lost in applications where more than one microprocessor is required.
Recently, programmable logic devices (PLDs) have been developed to overcome the shortcomings of both traditional and application-specific microprocessors. PLDs are designed to reconfigure themselves, as needed, for specific applications.
PLDs generally include a configurable logic portion and a personalization memory portion. Information is stored in the memory portion and is used to set the configuration of the logic portion.
One form of PLD is a field programmable gate array (FPGA) device.
Suppliers of PLDs often provide libraries of pre-defined logic functions for the PLD, such that a customer can configure the PLD for a specific application by loading the configuration data into the memory of the microprocessor. Thus the set-up time and manufacturing time for these PLD devices are shorter that for application-specific microprocessors. However, the use of the memory-controlled connecting components for the circuit routing makes FPGAs considerably slower than application-specific circuits, for the same applications. Furthermore, most of the circuit area of a FPGA is devoted to the control gates compared to the logic circuitry. In addition, typical FPGAs are essentially one-time programmable, so multiple chips are required to perform multiple functions. Accordingly, microprocessors with reprogrammable personalization memory are desired.
FIG. 1 illustrates a reconfigurable logic circuit 100, which uses electrochemical nanobridge technology to reconfigure PLD devices. Circuit 100 includes a plurality of logic cells 102 coupled together by rows 104 and columns 106 of wiring in a two-dimensional, crossbar matrix 106. Transistors are located at the intersection of the lines and columns, and each transistor is controlled by a static random access memory (SRAM) device 108. The area at each intersection is therefore defined by the area of the SRAM device, which is relatively large-typically 120F2, where F is the minimum feature size in the SRAM device.
Accordingly, improved programmable logic devices, with reduced area devoted to control gates, and which are relatively fast, are desired.